Example embodiments relate to a memory device, and more particularly, to a memory device detecting an error occurred during data transmission and blocking writing of the data to a memory cell array when the error is detected, and a method for operating the memory device.
As a semiconductor system has been rapid, an operating speed of a semiconductor device becomes a factor restricting the performance of the semiconductor system. To solve the factor, a high performance DRAM such as a synchronous dynamic random access memory (SDRAM) and a double data rate SDRAM (DDR SDRAM), which the operating speed has been increased, is being developed.
However, as the operating speed of a memory device has been increased, an error of a data transmitted to the memory device from the outside may be generated, thereby decreasing reliability of the data transmitted to a memory core included in the memory device.